Hello all,
I am theory crafting for future Cryo-EM analysis in our department, and was wondering if people have started working with PCI 5.0 and DDR5, and what performance differences you see or anticipate seeing with these new(-ish) protocols.
While I do have a snowglobe which could conceivably be labelled a “crystal ball” it seems to be faulty in predicting the future. 
So far DDR5 shows minor performance regressions compared to quality DDR4. Due to latency increases in the design not yet being overcome by bandwidth increases. This is standard for all new RAM, though, so will improve with time. It’s partly DRAM IC related and partly memory controller related.
PCI-E Gen.5 is functionally meaningless for cryo-EM image processing right now. Even PCI-E Gen.3 is not fully saturated (nowhere near!) and that has one quarter the bandwidth per lane of Gen.5.
If you want an idea of how little it has an impact, every PCI-E generation various tech/overclocking/gaming oriented sites carry out benchmarks to show how much (or how little) impact the increased bandwidth has. Go check out those, because a (well coded) demanding game can put a lot more general load on the PCI-E bus than almost all cryo-EM processing. You have to deal in generalities, though, because I’ve not found a good synthetic equivalent benchmark for processing real data. The load on the system varies too much, across too many different subsystems. Even NVMe RAID can’t feed multiple GPUs fast enough to make the PCI-E bus the bottleneck in performance.
This looks at the 4090 and 5090.
Anecdotally, some recent testing I did with 2xA4000 GPUs on a 9950X/B650 board (one in an x8 slot, one in a x4 slot) versus 2xA4000s in an 9950X/X870E board (dual x16 slots) showed lower-than-statistical-error performance differences in MotCor2, RELION 2D & 3D classification and 3D refinement. CryoSPARC isn’t installed on the B650 system so didn’t/can’t test that. This was not extensive testing, however, just a quick run through a tutorial dataset as a stability test, so YMMV.
To be honest, you’ll probably see more performance improvements by adjusting the scheduler in the kernel, or the filesystem(s) in use than worrying about PCI-E generation right now… but if the system is part of a cluster managed by someone else (read: University/Institute), they probably won’t allow kernels optimised until they squeak, or other tuning adjustments. And not everyone is comfortable managing non-standard installs…
Hey! Yes, some labs have started using PCIe 5.0 and DDR5 for Cryo-EM workflows. DDR5 offers better bandwidth, and PCIe 5.0 speeds up storage and GPU communication. Real-world gains depend on the software, but for large datasets and high I/O, you should see smoother performance overall.